V850 and RH850 Embedded Software Solutions
Software development tools
- MULTI development
Quickly develop, debug, test, and optimize embedded and real-time applications
- Green Hills Optimizing Compilers
Generating the smallest and fastest code from C, C++, and Ada
Full-feature multi-core instruction-accurate simulation tool that allows faster development and deployment of V850 and RH850 multi-core projects. Support for various shared-memory and isolated architectures, as well as complete support for RH850 hyper-threading capabilities
- Green Hills Probe
High-performance real-time debugging
- Renesas MINICUBE, MINICUBE2, IECUBE, IECUBE2, and E1
- Midas Labs ICE
Device lifecycle management and data encryption
Device Lifecycle Management (DLM)
Protects hardware and software IP during all facets of the manufacturing process against counterfeiting, cloning and other tampering.
- High-Assurance Embedded Cryptographic Toolkit
Complete set of C- language cryptographic algorithms validated to FIPS 140-2 level 1 and meeting the NSA Suite B Standard.
V850 and RH850 Optimizing Compilers
The Green Hills Optimizing Compilers for V850 and RH850 all use a common code generator with architecture-specific optimizations. Some optimizations include loop optimizations, peephole optimizations, register coalescing, tail recursion, and memory optimization. As an additional benefit, Green Hills offers CodeFactor®, a link-time optimization which reduces overall program size by identifying and removing redundant segments of code from object files.
Each supported V850 and RH850 model has its own particular pipeline and instruction set characteristics. These are accommodated in the code generator to produce code best suited for the target processor. The following V850 and RH850 specific features are supported:
- Processor—One option for each supported V850 and RH850 model. This setting determines the instructions permitted, as well as the pipeline optimization strategy used.
- Reserve registers for the user—The compiler can reserve various registers (r2, r5, r15-r24 or r17-r22) for the user.
- Position Independent Code (PIC) and Data (PID)—Allows code and data to be placed anywhere in memory and still run correctly.
- Far function calls—Linker can automatically detect function calls that are out of range and insert code to resolve these calls.
- Gsrec conversion utility—Converts an executable file into a Motorola S-Record format file.
- FPU Support—Generates code to use the Floating Point Unit (FPU) for the V850E1F (V850E/PH2 and V850E/PH3) and RH850 families or the V850E2R.
- 64-bit Integers—Supports 64-bit data types, constants, and expressions including double precision floating point.
- Ghexfile Conversion Utility—Allows conversion of an executable to hexadecimal. Automatically determines byte order and BCS/COFF based on header information.
- Multiple memory models—The V850 and RH850 support\ the following
- Normal data: The default memory model, where all data is placed within the data area and is accessed using normal load and store operations.
- Small data: Data is assigned either automatically by the compiler or manually by the user (or both) into a small data area and is referenced using a reserved register as a base pointer, allowing for smaller code for data accesses.
- Zero data: Similar to Small data, although the zero register (r0) is used as the base register to access data within 16 bits of address 0.
- Tiny data: Data is assigned by the user into small sections accessed using the Tiny Data Area (TDA) base register (ep) and the V850 short load/store operations providing for the smallest possible code for data accesses. The compiler supports multiple Tiny Data Areas and can switch between them dynamically at run time.
- CodeFactor Linker Optimization—A link-time optimization that reduces overall program size by identifying and removing redundant segments of code.
- Highly configurable—Many processor extensions and features (callt, prepare/dispose, etc) can be selectively enabled or disabled in the compiler, with full support provided in the Green Hills libraries.
A comprehensive suite of run-time libraries for C, C++, and EC++ are included in the corresponding compiler distributions for each language. Several different versions of the libraries are provided to accommodate different combinations of processor and memory models. The combinations include hardware vs. software floating point, and CPU specific versions. Full featured start-up code and libraries include automatic copy of data from ROM to RAM and system call emulation.
MISRA C support
Green Hills has incorporated the MISRA C guidelines for C programming into MULTI and its optimizing compilers. MULTI’s MISRA C support enables developers to easily select the MISRA rules to automatically enforce, resulting in cleaner code and fewer bugs. At compiler time, violations of MISRA C rules are reported. Violations that can only be detected at runtime are automatically detected and reported by Green Hills Software’s advanced run-time error detection. MULTI supports MISRA C 1999 and 2004.
- 850eserv2—Supports a wide variety of In-Circuit Emulators from Renesas. Full support is included for the built-in instruction and data trace capabilities, which is fully integrated with the TimeMachine Debugging Suite. When combined with the Green Hills SuperTrace Probe, trace collection potential can be extended into the gigabytes.
- rteserv2—Supports a wide variety of boards and In-Circuit Emulators from Renesas and Midas Labs. Devices supporting trace can be combined with the Green Hills SuperTrace Probe to unleash full data and instruction trace capabilities, including a full integration with the TimeMachine Debugging Suite.
- Support for the ASTC OSCAR VLAB virtual platform solution and the Synopsys Virtual Platform Manager is available, enabling developer to engage with their V850 and RH850 hardware platforms before the board even exists