Advanced RTOS, embedded real-time OS, compact OS, IDE, Software development toolkits, embedded c compilers, Multicore debugger, hardware probes, static source code analysis tool, secure hypervisor, virtual prototyping platform
ThreadX for MIPS Thread RTOS
 
Express Logic's ThreadX® Real-Time Operating System (RTOS) is available from and supported by Green Hills Software. ThreadX is fully integrated with the Green Hills Software MULTI® Integrated Development Environment, providing Optimizing Compilers, Source Debugger, Graphical Project Builder and many other powerful tools for development of embedded applications.

Fast Execution

(33MHz, Kseg0, R3000)
context switch 1.4us
tx_thread_suspend 3.6us
tx_thread_resume 3.2us
tx_thread_relinquish 0.9us
tx_semaphore_get 1.3us
tx_semaphore_put 1.0us
tx_queue_send 2.3us
tx_queue_receive 2.3us
tx_event_flags_set 2.5us
tx_event_flags_get 2.5us
tx_block_allocate 2.1us
tx_block_release 1.4us
tx_byte_allocate 4.8us
tx_byte_release 2.2us

Supported IDE
MULTI For ThreadX
Highlights

Complete MIPS family support
Reasonable pricing
Royalty-Free
Complete ANSI C source code
Easy to use and powerful services
Responsive Technical Support
Unlimited Threads, Queues, Event Flags, Timers, Semaphores, Block Pools, and Byte Pools
Flexible memory usage
Timeout available on all thread suspension
Advanced preemption-threshold technology
Low-overhead Application Timers
Size scales automatically
picokernel architecture for size and speed



Small footprint (sizes in bytes):
     Instruction area size 5-25K
     Global data area 696
     Thread control block 144
     Queue control block 44
     Event Flag control block 28
     Timer control block 56
     Semaphore control block 32
     Block Memory control block 48
     Byte Memory control block 52
MIPS Optimizations
ThreadX optimizes context switching on the MIPS. When context switching occurs inside of a ThreadX service call, only the registers preserved across function calls are saved as part of the thread's context, i.e. registers s0-s8.

A similar technique is used in interrupt handling. On the front end of interrupt service routines, only the compiler's scratch registers are saved initially (registers at v0-v1, a0-a3, and t0-t9). The full register set is saved only if thread preemption is required.
 
Improve Your MIPS Development
Let our extensive experience with the MIPS family of microprocessors help your product development. The ThreadX high-performance real-time kernel, helps improve your product's quality and its time-to-market. In addition, using ThreadX makes it easier to enhance your product in the future.
 
Easy to Use
ThreadX is designed for ease of use. The API is designed to be easy to understand, powerful, and consistent. The same is true with our reference manual and other supporting documentation.


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