Ada Embedded Software Development Tools -
Power Architecture (formerly PowerPC) Family

Green Hills Software provides a comprehensive set of development tools for Power Architecture based applications:

Optimizing compilers

• Ada 95
• C
• C++
• FORTRAN
• Run-time libraries

AdaMULTI® integrated development environment

• Automated program builder
• Source-level symbolic debugger
• Performance and coverage profiler*
• Run-time error checking
• Version control system
• Text editor
• Interactive call graph display
• Interactive package dependency displays
• Interactive source code navigation and cross reference browser
• Tagged type inheritance browser
• 3rd Party tool integration

Runtime support

• VxWorks®/Tornado® real-time operating system
• Bare Board Ada Runtime
• INTEGRITY® real-time operating system
• RT Secure™ real-time operating system

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The Green Hills optimizing compilers for Power Architecture all utilize a common code generator with architecture-specific optimizations. Each supported Power Architecture model has its own particular pipeline and instruction set characteristics. These are accommodated in the code generator to produce code best suited for the target processor. The Green Hills Power Architecture optimizing compilers support the following Power Architecture - specific features:

• Processor options - One option for each supported Power Architecture model. This setting determines the instructions permitted, as well as the pipeline optimization strategy used.
• Constant data section- Places all string literals, constants, and initialized variables declared const in C and C++ in a distinct section.
• Position independent code (PIC) and data (PID) - Allows code and data to be placed anywhere in memory and still run correctly.
• Inline prologue - The compiler chooses the most efficient function prologue and epilogue. This option prevents the compiler from calling off to library routines; inline code sequences will be used instead.
• Far function calls - Loads address of a function into the link register, and branches through it. This handles code that exceeds the limits of the Power Architecture call instruction.
• Label at end of function - Places a label at end of function. This can be useful for diagnostic utilities.
• Small data area - Like most RISC processors, Power Architecture requires two 32-bit instructions to access data stored at an arbitrary 32-bit address. The Green Hills compilers collect frequently accessed variables into a 64K or less block of memory. This enables data within this block, performance. The Power Architecture has two small data areas (one is for read-only data).

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* This feature is configuration-dependent and may require custom integration. Please contact your local sales representative for further information.

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