Processor options - One option for each supported Power Architecture model. This setting determines the instructions permitted, as well as the pipeline optimization strategy used.
	Constant data section- Places all string literals, constants, and initialized variables declared const in C and C++ in a distinct section.
	Position independent code (PIC) and data (PID) - Allows code and data to be placed anywhere in memory and still run correctly.
	Inline prologue - The compiler chooses the most efficient function prologue and epilogue. This option prevents the compiler from calling off to library routines; inline code sequences will be used instead.
	Far function calls - Loads address of a function into the link register, and branches through it. This handles code that exceeds the limits of the Power Architecture call instruction.
	Label at end of function - Places a label at end of function. This can be useful for diagnostic utilities.
	Small data area - Like most RISC processors, Power Architecture requires two 32-bit instructions to access data stored at an arbitrary 32-bit address. The Green Hills compilers collect frequently accessed variables into a 64K or less block of memory. This enables data within this block, performance. The Power Architecture has two small data areas (one is for read-only data).

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* This feature is configuration-dependent and may require custom integration. Please contact your local sales representative for further information.
 

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