The velOSity RTOS, which targets low-cost, deeply embedded applications, will be bundled with the SH-1, SH-2, and SH-3 evaluation boards. INTEGRITY, which targets mission-critical applications that require enhanced security features, will be bundled with the SH-3, leveraging the protection facilities of the CPU's integrated hardware memory management unit. The two RTOSs feature pre-emptive, priority-based multitasking, high-speed context switching, and low-latency interrupt response. The two RTOSs also share a common set of system services and API, which simplifies the migration of applications between platforms based on the two RTOSs.

Green Hills' MULTI provides an integrated development environment for applications targeting the SH-1, SH-2, and SH-3 evaluation boards. Featuring an optimizing C compiler and RTOS-aware source-level debugger, MULTI also provides an execution profiler, editor, program builder, source code control system, and run-time error checking. The MULTI Software Development Environment supports the Hitachi E7000, E7000/PC, Hewlett-Packard, and Orion in-circuit emulators. Host development platforms include the Sun SPARC (SunOS and Solaris), HP 9000/700 (HP-UX), IBM RS/6000 (AIX), Alpha AXP (Digital Unix), Motorola PowerStack (AIX), and PCs running Windows 3.1 and Windows 95.

Said Green Hills President Dan O'Dowd, "velOSity and INTEGRITY dovetail well with Hitachi's family of SuperH CPUs and evaluation boards. SH-1 and SH-2 based platforms equipped with velOSity make an ideal combination for applications with demanding real-time performance and cost constraints. The availability of free run times will also help keep costs down for target systems based on the SH-1 and SH-2." "On the other hand," continued O'Dowd, "INTEGRITY's bullet-proof run-time environment is tailor made for SH3-based mission critical applications that want to leverage the advanced protection facilities of the SH-3's integrated MMU."

"Hitachi is very pleased with the announcement of expanded development support from Green Hills across the breadth of the SH RISC series," said Ken Kristie, microcontroller product marketing manager for Hitachi America. "As a leading development tools provider, Green Hills has been instrumental in the rapid acceptance of the SuperH architecture, and the added value of the bundled RTOS with every Hitachi SH evaluation board provides a great standard package for embedded developers."

Hitachi's family of Super-H processors targets a broad range of embedded applications, from personal digital assistants and consumer devices, to multimedia, wireless and portable processing products.

Hitachi's 32-bit SuperH RISC engine family delivers the industry's best combination of cost/performance, power/performance and integration, providing the most efficient solutions for emerging embedded applications in wireless and network communications, handheld PCs, entertainment and consumer electronics. With over 900 design wins since its introduction in 1994, the architecture is the worldwide leader in RISC shipments, with 14 million devices shipped in 1995 and over 1.5 million units shipping per month in 1996.

The SH-1 series the first single-chip RISC achieves 20 MIPS at 20MHz. With on-chip ROM/RAM and a high level of peripheral integration, it is ideal for power-sensitive embedded applications requiring RISC performance. With 28 MIPS, SH-2 series processors can be used in multi-chip or multi-processor designs and offer high bus bandwidth, on-chip cache and the SDRAM/DRAM/SRAM interface needed for interactive entertainment and multimedia applications. The SH-3 series, with on-chip cache, memory management and DSP multiply-accumulate functionality, is capable of up to 100 MIPS at 3.3V and sets industry standards for efficiency at <40=A2/MIPS and 143 MIPS/W.

The Hitachi SH evaluation boards are complete, low-cost kits providing all the hardware, software and documentation needed to create a model of the designer's system. The kit includes everything to help design, write, compile and debug the application.

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